References
Team
Contact: accelcom@bsc.es
Core
- Sergio Iserte (BSC)
- Petter Sandås (BSC)
- Íñigo Aréjula-Aísa (BSC)
- Antonio J. Peña (BSC)
Former members
- Vicenç Beltran (BSC)
- Rafael Mayo (UJI)
- Enrique S. Quintana-Ortí (UPV)
Acknowledgments
- The European PILOT (EuroHPC-JU grant agreement No 101034126).
- Barcelona Zettascale Laboratory (Ministerio de transformación digital y servicios públicos - funded by EU)
- Quantum Enia (Ministerio de transformación digital y servicios públicos - funded by EU)
Highlighted Publications
Runtimes
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S. Iserte et al., "Resource optimization with MPI process malleability for dynamic workloads in HPC clusters." Future Generation Computer Systems, Jan. 2026. https://doi.org/10.1016/j.future.2025.107949
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D. Huber et al., "Dynamic Resource Management in HPC Systems Using Dynamic Processes with PSets." 2025 IEEE 32nd International Conference on High Performance Computing, Data, and Analytics (HiPC), pp. 279--289, Dec. 2025. https://doi.org/10.1109/HiPC66333.2025.00036
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D. Huber et al., "Bridging the Gap Between Genericity and Programmability of Dynamic Resources in HPC." ISC High Performance 2025, Jun. 2025. https://ieeexplore.ieee.org/document/11018304
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S. Iserte et al., "Towards the Democratization and Standardization of Dynamic Resources with MPI Spawning." Main Track Best Paper Award PPAM 2024, Sep. 2024. https://doi.org/10.1007/978-3-031-85697-6_19
Scientific applications
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P. Sandås et al., "Malleable Molecular Dynamics Simulations with GROMACS and DMR." PPAM 2026 (in-press), Sep. 2026.
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S. Iserte et al., "Malleable Computational Fluid Dynamics Simulations." Parallel CFD 2025 (in-press), Nov. 2025.
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S. Iserte and K. Rojek, "A Study of the Effect of Process Malleability in the Energy Efficiency on GPU-based Clusters." Journal of Supercomputing, Oct. 2020. https://doi.org/10.1007/s11227-019-03034-x
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S. Iserte et al., "Dynamic Reconfiguration of Non-iterative Scientific Applications: A Case Study with HPG-aligner." International Journal of High Performance Computing Application(33), pp. 1--10, Aug. 2018. ISSN: 1094-3420. https://doi.org/10.1177/1094342018802347
Workloads
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M. Cipollini et al., "Three ways to share a QPU: Scheduling strategies for hybrid Quantum-HPC applications." Future Generation Computer Systems, Jan. 2026. https://doi.org/https://doi.org/10.1016/j.future.2026.108699
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S. Iserte et al., "MPI Malleability Validation under Replayed Real-World HPC Conditions." Future Generation Computer Systems, Dec. 2025. https://doi.org/10.1016/j.future.2025.108305
State of the art
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A. Tarraf et al., "Malleability in Modern HPC Systems: Current Experiences, Challenges, and Future Opportunities." IEEE TPDS, Jun. 2024. https://doi.org/10.1109/TPDS.2024.3406764
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J. Aliaga et al., "A Survey on Malleability Solutions for High-Performance Distributed Computing." Applied Science, May 2022. https://doi.org/10.3390/app12105231
DMRv1
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S. Iserte et al., "DMRlib: Easy-coding and Efficient Resource Management for Job Malleability." IEEE Transactions on Computers, Sep. 2020. https://doi.org/10.1109/TC.2020.3022933
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S. Iserte et al., "DMR API: Improving Cluster Productivity by Turning Applications into Malleable." Parallel Computing, Jul. 2018. https://doi.org/10.1016/j.parco.2018.07.006
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S. Iserte, "High-throughput Computation through Efficient Resource Management" UJI 2028. https://doi.org/http://dx.doi.org/10.6035/14101.2018.176272
Derived work
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M. De Rosso, "Empowering the DMR Malleability framework for MPI with the ULFM extension", POLIMI 2025. https://www.politesi.polimi.it/handle/10589/243438
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F. J. Rodríguez-Olmeda, "HPC Paramal Malleability Traceability", UOC 2024. https://openaccess.uoc.edu/handle/10609/151191